An overview of the semiconductor industry. Aims to understand:
- What are the moats in the industry?
- When you are looking at a company, where does it sit in the ecosystem?
- Long term trends. Trends in this industry take years of industry-wide cooperation and billions of dollars to play out. Once you can see a trend start, you can pick tomorrow's winners.
Types of Chips
Memory Chips
Memory chips were a commodity subject to wild supply and demand swings. Now the industry has consolidated into 3 players: Samsung, SK Hynix (both Korean) and Micron.
Source: For the first time in Memory, have durable profits finally arrived?
China's YMTC recently entered the market, aiming for a 6-8% market share in 2022. Their chips are state-of-the-art, but YMTC is on the US blacklist.
Despite its oligopoly structure, the memory industry is in a downturn (crash?) now due to falling demand from a post-covid hangover. While Samsung is maintaining capex. The memory industry is still irrational.
In the long run:
- The Koreans look like winners due to scale and predatory capex/pricing.
- Micron looks like a loser due to debt and lack of EUV.
- YMTC will operate in its own market, but will slowly fall behind from lack of EUV.
Logic Chips
Two main types:
- CPU's run general instructions to allow a computer to do anything. They are designed by Intel/AMD (for computers), or ARM (originally for handphones - now also computers).
- GPUs are specialised chips to perform simple math calculations. Used for graphics displays (eg: realistic games) and AI (matrix calculations). The leading GPU designer is NVDIA - they have a moat from their CUDA interface being a standard, but its being challenged.
Logic Chips are built in Fabs, usually separate from the company that designed them. The foundry industry has consolidated so that only three companies can build modern logic chips:
Of the three leading-edge players:
- Samsung is fucked for high end logic chips. They have a top down management culture unsuited to technology development and are serial liars.
- TSMC is the clear leader due to their partnership with Apple. The risk for TSMC is a Chinese blockade/invasion of Taiwan - I give it a 30% chance before 2030. Even without war, new foundries have to be built elsewhere, which has to be bad for the market in the long term.
- Intel has historically fabbed its own chips from when it was the leader in the 90's, but has now fallen behind both in chip design and foundry capability. Intel has a bad capital structure and was bleeding to death. They may have stopped the bleeding with their Feb dividend cut.
CPUs are currently in a downturn due to the covid-hangover, but not as bad as memory.
GPUs (including ASICS for crypto mining) are in a downturn, but NVDIA's stock is in an AI bubble.
Analog
System on a Chip (SOCs)
- Expect the decline of Intel/AMD chip designs in desktop/server computing. Intel/AMD's x86 or x64 chips use CISC (complex instruction sets) which are unsuitable for SOCs. The only advantage of x86/x64 is that you can run legacy DOS/windows programs developed since the early 80's. ARM chips (which are non-x86 or RISC) were not able to run them, but this has changed. Apple now has an emulator to run intel-compiled programs. Microsoft is developing an arm based server and tablet devices. Expect Wintel to die. Expect the majority of servers/desktops to move to ARM based processors, while x86/x64 chips become a specialised market for running legacy software.
- Big Tech (Apple, Google, Microsoft, Amazon) design their own in-house chips for their products/operations. e.g.: Amazon's Nitro SOC runs the hypervisor (VM manager) in their AWS, freeing up resources for user operations. Google's TPUs run AI calculations. This vertical integration can be a way to extend their moats. (...Or maybe over-optimisation just distracts them from their real business: Amazon, Google).
- Increasing importance of the "packaging" part of the chip production process (below).
Classifying Chips by Usage and Size
- High End: For phones, PCs and Servers. Produced in Taiwan, the US and South Korea. Designed in the US. Probably anything smaller than 28nm.
- Medium End: Probably 28nm or above. For automobiles, aerospace. Produced in Malaysia, Thailand, Philippines, Singapore, plus the above countries.
- Low End: For the IOT. To help your refrigerator keep track of your shopping list. Produced in China.
Production Process
Wafers
Produce the silicon wafers that chips will be printed on. The wafer market was an oligopoly, but may now be cracking:
- 5 companies produce(d?) 90% of silicon wafers (p5). 2 of those are Japanese: Sumco and Shin Etsu.
- 150mm and 200mm wafers are for older chips, 350mm are for newer ones. A proposal for 450mm wafers was killed by TSMC in 2013. The industry hasn't changed much since the 90's.
- Sumco expects no capacity expansion till 2024, despite a wafer shortage.
- This may give space for Chinese companies to enter the market, especially for 150 and 200mm. Chinese firms expanded production in 2021. South Korean imports form China almost doubled from 2020 to 2022. Chinese wafers are reportedly 5-10x cheaper than Japanese ones.
Lithography (ASML)
- "molten tin droplets of around 25 microns in diameter are ejected from a generator at 70 meters per second. As they fall, the droplets are hit first by a low-intensity laser pulse that flattens them into a pancake shape. Then a more powerful laser pulse vaporizes the flattened droplet to create a plasma that emits EUV light. To produce enough light to manufacture microchips, this process is repeated 50,000 times every second."
- ASML's supply chain is worldwide. Their suppliers are small companies that each specialise in one out of the hundreds of steps required. (eg: A small company in Vienna selling equipment to produce photomasks).
Inspection
Packaging
- From the old days, a DIP chip package, with its iconic "spider legs":
- Wire bonding: Using copper wire to attach the chip to the circuit board.
- Flip Chip: Depositing an array of solder balls onto the board's pads, and "flipping" the chip onto it.
- 2.5D packaging: TSVs passing through the wafer (like underground cables) connect different chips on the board. Used for SOCs.
- 3D packaging: Connect different chips which are all sitting on top of each other (on the circuit board). Currently used in memory chips, not yet in logic chips.
Testing
- Functional Testing: Running a current through a chip to test input and output combinations.
- System Level Testing: Test the chips under the conditions they are expected to be used. eg: Test at varying temperatures, or for long run-times (burn-in), structural tests, or software level testing (calling the chips functions/libraries in the same way that software wold).
Conclusions
Resources
- Fabricated Knowledge Substack. Good introduction.
- Semi Analysis Substack: Goes into more details.
- SemiWiki: I can't understand their technical articles, but can read their business ones.
- Transistor radio podcasts.
1 comment:
Excellent primer. Thank you.
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